Publications
24-jun-2010Livre blanc - Forecasted impact of FD SOI technology on design (pdf / 755 Ko)
Par Xavier Cauchy, Digital Application Manager, Soitec
As potential users of Fully Depleted Silicon-on-Insulator (FD-SOI) technology for the 22nm/20nm CMOS node and beyond realize its many interests, the question of its impact on design practices arises. Although FD-SOI for next generation technology nodes is not on commercial offer yet, it is nevertheless important to bring early answers or indications to that question. This document therefore proposes a synthesis of what is known or can be reasonably expected from FD-SOI from a design perspective, and indicates some interesting new potentialities that designers may be able to exploit.
24-jun-2010Livre blanc - Questions and answers on FD SOI technology (pdf / 361 Ko)
Par Xavier Cauchy, Digital Applications Manager, Soitec, avec François Andrieu, Senior Research Engineer, LETI
This document is a high level introduction to FD-SOI technology and its applicability to next technology nodes, in the form of a few key questions and their quick answers. No deep technical details are provided here, however Question 15 provides some relevant links. Short answers are provided first (hypertext links are provided, just click on the question of interest), followed by slightly more detailed answers for the interested readers.
17-sep-2009Livre blanc - Smart Stacking™ (pdf / 254 Ko)
A Wafer-stacking Technology Platform
par Dr. Bernard Aspar (Vice President, Tracit BU), Dr. Ian Cayrefourcq (Director
Technology Applications, Soitec) et Dr. Jocelyne Wasselin (VP Business Development, Soitec)
01-jui-2006Livre blanc - Strained Silicon on Insulator (pdf / 376 Ko)
A quick guide to the technology, the processes, the products
par George Celler (Chief Scientist, Soitec USA) et Ian Cayrefourcq (Manager, New Technology Development Dept., Soitec)
01-jui-2003Livre blanc - Smart Cut™ (pdf / 396 Ko)
A guide to the technology, the process, the products
par George Celler (Chief Scientist, Soitec USA) et Michael Wolf (Sr. VP, Sales & Marketing, Soitec)
01-mai-2003Frontiers of silicon-on-insulator (pdf / 1252 Ko)
par George Celler (Chief Scientist, Soitec USA) et Sorin Cristoloveanu
[Journal of Applied Physics]
Copyright (2003) American Institute of Physics. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Institute of Physics.